Demultiplexer or decoders are devices that have the function desired output selection is adjusted to a predetermined input. At the decoder if input as an example of three input a1, a2 and a3, then the output will be produced 2 ^ 3 = 8 output (b1, b2, b3, b4, b5, b6, b7 and B8).
In the picture below shows an example in the specification demultiplexer using TTL IC 74HC237
74HC237 demultiplexer Logic diagram The 74HC237 is a 3-to-8 line demultiplexer with latches at the three address inputs The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH.
The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH.
The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH.
truth table IC 74HC237 demultiplexer
Pinning IC 74HC237- supply voltage: 0.5 +7 V
- input diode current: ±20 mA
- output diode current: ±20 mA
- output source or sink current: ±25 mA
- storage temperature: 65 +150 °C
- power dissipation: 750 mW